Additive Circuitry Modification (ACM) Technology is a proprietary process which utilizes solid copper conductor technology to achieve ECOs on existing prin ted circuit boards. This process involves the addition of circuit traces to one or both sides of the PCB by processing another circuit layer on the board. Selec tive deposition of an isolation layer and a conductive trace layer is used when required by the customer The isolation layer acts as an insulator between conduc tors, and the solid copper layer forms the circuit. The following guidelines have been established to provide consistency to the ACM process. However, these are not limitations, as Additive Circuits, Inc. is continually advancing this t echnology to provide its customers with the highest quality service possible.
Line width:
Standard: .018 in. / .015/ .012/ .010
Minimum: .006 in.
Standard line width will be used wherever practical. Note:
Line widths are artwork apertures. Actual finished trace widths are
typically +/- .002-.004 in. Line spacing:
From
edge of PCB: .015 in. min.
Between parallel lines: .015 in. min. for a max. .7 in. length. For
parallel lines greater than 0.7 in. a jog in one of the line s is
suggested. From
any solderable surface: .006 in. min., .015 in. desired. Line characteristics:
All
bends will be 45 deg., if possible; 90 deg. bends will be avoided.
Crossovers of power or ground will be made at 90 deg. wherever possible.
A minimum clearance of .005 in. should be maintained under components
(where lines run under them). Length of timing lines will be determined
by the user based on the process characteristics. Fine pitch surface mount applications:
Surface mount stencils should be modified with a "half etch"
to create a cavity that accommodates the added traces. An artwork layer
will be provided to your stencil maker. Conductors:
Long,
narrow conductor traces should be avoided wherever possible especially
in high current paths (more than 1 amp). such as Vcc and ground. Interconnects:
Interconnects can be made to any solderable surface. Interconnects must
have a minimum .002 in. overlap. Interconnects and pads for surface
mounted components can be accomplished as long as other guidelines are
followed. Trace Cuts:
Surface trace cuts and internal trace cuts can be accommodated. Pad
isolations can be easily achieved. Insulation resistance:
The
isolation layer used in the process has an insulation resistance on the
order of 1013 ohms and has a dielectric strength on the order of 1000
volts/mil. Typical epoxy thickness is .001 +/- .0003 in.